A new FM transmitter is reported. It adopts a fractional-N PLL synthesizer to realize the FM modulator. An extra offset current has also been applied to eliminate the effects of the mismatch in CP. The chip is fabricated with CSMC 0.5μm DPTM CMOS technology. Experiments show that it achieves THD≤0.08% and SNR≤ 82dB,and the maximum outband emission energy ≤ 90dBc/Hz. Furthermore,it also uses an auto frequency adjusting method to avoid tuning up the external inductances. All these merits are very suitable for FM transmission.
This paper introduces a novel digital transceiver for the cordless telephone zero （CT0） standard,which uses a digital modulation and demodulation technique to handle the signal instead of the traditional analog meth-od. In the transmitter,a fractional-N phase locked loop （PLL） is utilized to realize the continuous phase frequency shift key （CPFSK） modulation,and a 2 Ts raised cosine （2RC） shaping technique is used to reduce the occupied bandwidth. In the receiver,a novel digital method is proposed to demodulate the 2RC CPFSK signal. This chip is fabricated using an SMIC 0.35μm mixed signal CMOS process with a die size of 2mm × 2mm. With an external low noise amplifier （LNA）,the sensitivity of the chip is better than -103dBm.
