Rapid progress in manufacturing greatly challenges to the VLSI physical design in both speed and performance. A fast detailed placement algorithm, FAME is presented in this paper, according to these demands. It inherits the optimal positions of cells given by a global placer and exact position to each cell by local optimization. FM Mincut heuristic and local enumeration are used to optimize the total wirelength in y and x directions respectively, and a two way mixed optimizing flow is adopted to combine the two methods for a better performance. Furthermore, a better enumeration strategy is introduced to speed up the algorithm. An extension dealing with blockages in placement has also been discussed. Experimental results show that FAME runs 4 times faster than RITUAL and achieves a 5% short in total wirelength on average.
