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国家自然科学基金(10979003)

作品数:13 被引量:14H指数:2
相关作者:付在伟宁哲衡月昆祁鸣钱森更多>>
相关机构:中国科学院中国科学院研究生院南京大学更多>>
发文基金:国家自然科学基金中国博士后科学基金更多>>
相关领域:理学自动化与计算机技术核科学技术电子电信更多>>

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13 条 记 录,以下是 1-10
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高时间分辨T0用PMT性能测试研究
通过基于WinXP环境的VME数据获取系统,对MRPC束流实验中时间触发系统(T0)的光电倍增管(PMT)进行性能测试研究。从精确测试获取的PMT单光电子峰出发,依据电荷谱的能量分辨率、峰谷比值、增益等条件确定PMT合适...
钱森付在伟宁哲王贻芳衡月昆祁鸣
关键词:VME光电倍增管
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The control and monitor system for the BESⅢ ETOF/MRPC beam test
2015年
A test system is developed for the BESIII ETOF/MRPC beam tests of data acquisition, environment monitoring and automatic control. The software framework is based on the CAMAC bus, VME bus and Serial Port,which are responsible for communications with the detectors. The monitor system works well in the beam test.
钱森宁哲付在伟陈晓辉孙勇杰杨帅贾茹张家文衡月昆李澄李家才祁鸣郑阳恒
关键词:MRPCPC梁测试系统VME总线
Clock auto-synchronization method for BESIII ETOF upgrade
2015年
An automatic clock synchronization method implemented in a field programmable gate array (FPGA) is proposed in this paper. It is developed for the clock system which will be applied in the end-cap time of flight (ETOF) upgrade of the Beijing Spectrometer (BESIII). In this design, an FPGA is used to automatically monitor the synchronization circuit and deal with signals coming from the external clock synchronization circuit. By testing different delay time of the detection signal and analyzing the signal state returned~ the synchronization windows can be found automatically by the FPGA. The new clock system not only retains low clock jitter which is less than 20ps root mean square (RMS), but also demonstrates automatic synchronization to the beam bunches. So far, the clock auto-synchronizing function has been working successfully under a series of tests. It will greatly simplify the system initialization and maintenance in the future.
王思宇曹平刘树彬安琪
关键词:BESIII
Prototype of time digitizing system for BESⅢ endcap TOF upgrade
2014年
The prototype of a time digitizing system for the BESⅢ endcap TOF (ETOF) upgrade is introduced in this paper, The ETOF readout electronics has a distributed architecture. Hit signals from the multi-gap resistive plate chamber (MRPC) are signaled as LVDS by front-end electronics (FEE) and are then sent to the back-end time digitizing system via long shield differential twisted pair cables. The ETOF digitizing system consists of two VME crates, each of which contains modules for time digitization, clock, trigger, fast control, etc. The time digitizing module (TDIG) of this prototype can support up to 72 electrical channels for hit information measurement. The fast control (FCTL) module can operate in barrel or endcap mode. The barrel FCTL fans out fast control signals from the trigger system to the endcap FCTLs, merges data from the endcaps and then transfers to the trigger system. Without modifying the barrel TOF (BTOF) structure, this time digitizing architecture benefits from improved ETOF performance without degrading the BTOF performance. Lab experiments show that the time resolution of this digitizing system can be lower than 20 ps, and the data throughput to the DAQ can be about 92 Mbps. Beam experiments show that the total time resolution can be lower than 45 ps.
曹平孙维佳季筱璐范欢欢王思宇刘树彬安琪
关键词:TIME-OF-FLIGHT
WinXP环境中通用VME系统数据获取研究被引量:3
2010年
在WinXP环境中,利用图形界面开发软件LabVIEW,研究了VME插件通用数据获取系统的编译和封装。结合LabVIEW仿真仪器面板功能,通过调用机箱控制器的动态链接库,封装各类VME电子学插件的底层驱动为功能函数模块,方便用户快捷调用。完成多块VME插件的BLT、MBLT、CBLT读出方式研究,在此基础上编译了一系列VME电子学插件数据获取功能模块,由此,可根据不同实验需求,方便快捷的对功能模块进行调用和配置。介绍了该高精度数据获取软件在多个实验环境中成功应用所取得的结果。
宁哲钱森付在伟王贻芳衡月昆张家文郑阳恒祁鸣
关键词:VMELABVIEW数据获取
TOT measurement implemented in FPGA TDC被引量:1
2015年
Time measurement plays a crucial role for the purpose of particle identification in high energy physics experiments. With increasingly demanding physics goals and the development of electronics, modern time measurement systems need to meet the requirement of excellent resolution specification as well as high integrity. Based on Field Programmable Gate Arrays(FPGAs), FPGA time-to-digital converters(TDCs) have become one of the most mature and prominent time measurement methods in recent years. For correcting the time-walk effect caused by leading timing, a time-over-threshold(TOT) measurement should be added to the FPGA TDC. TOT can be obtained by measuring the interval between the signal leading and trailing edges. Unfortunately, a traditional TDC can recognize only one kind of signal edge, the leading or the trailing. Generally, to measure the interval, two TDC channels need to be used at the same time, one for leading, the other for trailing. However, this method unavoidably increases the amount of FPGA resources used and reduces the TDC's integrity.This paper presents one method of TOT measurement implemented in a Xilinx Virtex-5 FPGA. In this method,TOT measurement can be achieved using only one TDC input channel. The consumed resources and time resolution can both be guaranteed. Testing shows that this TDC can achieve resolution better than 15 ps for leading edge measurement and 37 ps for TOT measurement. Furthermore, the TDC measurement dead time is about two clock cycles, which makes it good for applications with higher physics event rates.
范欢欢曹平刘树彬安琪
Method for improving the time resolution of a TOF system被引量:1
2013年
In order to study the possibility of improving the timing performance of the time of flight (TOF) systems, which are made of plastic scintillator counters, and read out by photomultiplier tubes (PMT) with mesh dynodes and conventional electronics, we have conducted a study using faster PMTs and ultra fast waveform digitizers to read out the plastic scintillators. Different waveform analysis methods are used to calculate the time resolution of such a system. Results are compared with the conventional discriminating method based on a threshold and pulse height. Our tests and analysis show that significant timing performance improvements can be achieved by using this new system.
李绍莉衡月昆赵天池付在伟刘术林钱森刘曙东陈晓辉贾茹黄国瑞雷祥翠
A GEANT4 simulation study of BESⅢ endcap TOF upgrade
2013年
A GEANT4-based Monte-Carlo (MC) model is developed to study the performance of endcap time- of-flight (ETOF) at BESIII. It's found that the multiple scattering effects, mainly from the materials at the MDC endcap, can cause multi-hit on the ETOF's readout cell and significantly influence the timing property of ETOF. A multi-gap resistive plate chamber (MRPC) with a smaller readout cell structure is more suitable for the ETOF detector due to significantly reduced multi-hit rate (per channel), from 71.5% for currently-used scintillator-based ETOF to 21.8% or 16.7% for MRPC-based ETOF, depending on the readout pad size used. The timing performance of an MRPC ETOF is also improved. These simulation results suggest and guide an ETOF upgrade effort at BESIII.
张辉邵明李澄陈宏芳衡月昆孙勇杰唐泽波姬长胜陈天翔杨帅
关键词:BESIIIMRPC
Beam test of signal cross-talk and transmission for LMPRC被引量:1
2011年
A new prototype of large area Multi-gap Resistive Plate Chamber (MRPC) with long readout strips was built. This Long-strip Multi-gap Resistive Plate Chamber (LMRPC) is double stacked and has ten 250 μm-thick gas gaps. Signals are read out from the two ends of each strip with an active area of 50 cmx 2.5 cm in each. The detector was tested at FOPI in GSI, using the secondary particles of proton beams (E = 3.5 GeV) colliding with a Pb target. The results show that the LMRPC prototype has a time resolution of about 60- 70 ps; the detecting efficiency is over 98% and the ratio of cross-talk is lower than 2%. The detector also has a good spatial resolution of 0.36 cm along the strip direction.
孙勇杰李澄唐泽波徐来林陈天翔邵明
关键词:CROSS-TALK
时间触发系统用PMT性能测试研究被引量:9
2011年
通过基于WindowsXP环境的VME数据获取系统,对MRPC束流实验中时间触发系统(T0)的光电倍增管(PMT)进行性能测试研究。从精确测试获取的PMT单光电子峰的角度出发,依据电荷谱的能量分辨率、峰谷比值、增益等条件确定PMT合适的工作高压。依据时间和幅度信息的匹配关系,对不同入射光子的数据进行挑选,进而改善测试数据的时间分辨。
付在伟钱森宁哲王贻芳衡月昆王志刚陈晓辉刘曙东祁鸣张家文郑阳恒
关键词:VME光电倍增管
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