The module for function electrical stimulation （FES） of neurons is designed for the research of the neural function regeneration microelectronic system, which is an in-body embedded micro module. It is implemented by using discrete devices at first and characterized in vitro. The module is used to stimulate sciatic nerve and spinal cord of rats and rabbits for in-vivo real-time experiments of the neural function regeneration system. Based on the module, a four channel module for the FES of neurons is designed for 12 sites cuff electrode or 10 sites shaft electrode. Three animal experiments with total five rats and two rabbits were made. In the in-vivo experiment, the neural signals including spontaneous and imitated were regenerated by the module. The stimulating signal was used to drive sciatic nerve and spinal cord of rats and rabbits, successfully caused them twitch in different parts of their bodies, such as legs, tails, and fingers. This testifies that the neural function regeneration system can regenerate the neural signals.
A low-power IC for function electrical stimulation （FES） of nerves is designed for an implantable system and fabricated in CSMC＇s 0.6μm CMOS technology. The IC can be used for stimulating animals＇ spinal nerve bundles and other nerves connected with a cuff type electrode. It consists of a pre-amplifier,a main amplifier,and an output stage. According to the neural signal spectrum,the bandwidth of the FES signal generator circuit is defined from 1Hz to 400kHz. The gain of the circuit is about 66dB with an output impedance of 900. The 1C can function under a single supply voltage of 3-5V. A rail-to-rail output stage helps to use the coupled power efficiently. The measured time domain performance shows that the bandwidth and the gain of the IC agree with the design. The power consumption is lower than 6mW.
A low-power, high-gain circuit for function electrical stimulation （FES） is designed for the microelectronic neural signal regeneration system based on CSMC （CSMC Technologies Corporation） 0. 6μm CMOS （complementary metal-oxide-semiconductor transistor） technology. It can be used to stimulate microelectrodes connected with the nerve bundles to regenerate neural signals. This circuit consists of two stages： a full differential folded-cascode amplifier input stage and a complementary class-AB output stage with an overload protection circuit. The rail-to-rail input and output stages are used to ensure a wide range of input and output voltages. The simulation results show that the gain of the circuit is 81 dB; the 3 dB-bandwidth is 295 kHz. The chip occupies a die area of 1.06 mm × 0. 52 mm. The on-wafer measurement results show that under a single supply voltage of ＋ 5 V, the DC power consumption is about 7. 5 mW and the output voltage amplitude is 4. 8 V. The chip can also mn well under single supply voltage of ＋ 3.3 V.
