A high-voltage p-LDMOS（HV-pMOS） with field-oxide as gate dielectric and a RESURF drain drift region to undertake high gate-source voltage and drain-source voltage for the scan driver chip of plasma display panels （PDP） is purposed based on the epitaxial bipolar-CMOS-DMOS （BCD） process. The key considerations and parameters of the design are discussed：the thickness of gate dielectrics is 1mm and the area of the device is 80μm × 80μm. Only 18 photoetching steps are needed in the developed process,which is compatible with standard CMOS, bipolar, and VDMOS devices. The breakdown voltage of the HV-pMOS in the process control module （PCM） is more than 200V. The results are favorable for 170V PDP scan driver chips,which contribute to the competitive cost efficiency.
A VDMOS integrated in a 170V scan-driver chip of a plasma display panel （PDP） is described,which is based on epitaxial bipolar-CMOS-DMOS （BCD） technology. Some key considerations and parameters of the design are discussed. The thickness of epitaxial layer is 17μm, the area of a single VDMOS structure cell is 324μm^2, and only 18 photoetching steps are needed in the development process. It is also compatible with standard CMOS, bipo- lar,and p-LDMOS devices. The breakdown voltage of VDMOS in the process control module （PCM） is more than 200V. Five kinds of VDMOS modules are integrated in 64 channel PDP scan-driver IC, and on-line system verifica- tion is done on a LG-model-42v6 PDP.
