The degradation of device under GIDL （gate-induced drain leakage current） stress has been studied using LDD NMOSFETs with 1.4 nm gate oxides. Experimental result shows that the degradation of device parameters depends more strongly on Vd than on Vg. The characteristics of the GIDL current are used to analyze the damage generated during the stress. It is clearly found that the change of GIDL current before and after stress can be divided into two stages. The trapping of holes in the oxide is dominant in the first stage, but that of electrons in the oxide is dominant in the second stage. It is due to the common effects of edge direct tunneling and band-to-band tunneling. SILC（stress induced leakage current）in the NMOSFET decreases with increasing stress time under GIDL stress. The degradation characteristic of SILC also shows saturating time dependence. SILC is strongly dependent on the measured gate voltage. The higher the measured gate voltage, the less serious the degradation of the gate current. A likely mechanism is presented to explain the origin of SILC during GIDL stress.
The degradation of device parameters and the degradation of the stress induced leakage current （SILC） of thin tunnel gate oxide under constant direct-tunneling voltage stress are studied using nMOS and pMOSFETs with 1. 4nm gate oxides. Experimental results show that there is a linear correlation between the degradation of the SILC and the degradation of Vth in MOSFETs during different direct-tunneling （DT） stresses. A model of tunneling assisted by interface traps and oxide trapped positive charges is developed to explain the origin of SILC during DT stress.
An X-band four-way combined GaN solid-state power amplifier module is fabricated based on a self- developed AlGaN/GaN HEMT with 2.5-mm gate width technology on SiC substrate. The module consists of an Al- GaN/GaN HEMT, Wilkinson power hybrids, a DC-bias circuit and microstrip matching circuits. For the stability of the amplifier module, special RC networks at the input and output, a resistor between the DC power supply and a transistor gate at the input and 3λ/4 Wilkinson power hybrids are used for the cancellation of low frequency self-oscillation and crosstalk of each amplifier. Under Vds = 27 V, Vgs = -4.0 V, CW operating conditions at 8 GHz, the amplifier module exhibits a line gain of 5 dB with a power added efficiency of 17.9%, and an output power of 42.93 dBm; the power gain compression is 2 dB. For a four-way combined solid-state amplifier, the power combining efficiency is 67.5%. It is concluded that the reduction in combining efficiency results from the non-identical GaN HMET, the loss of the hybrid coupler and the circuit fabricating errors of each one-way amplifier.
This paper studies the drain current collapse of A1GaN/GaN metal insulator-semiconductor high electron-mobility transistors （MIS-HEMTs） with NbA10 dielectric by applying dual-pulsed stress to the gate and drain of the device. For NbA10 MIS-HEMT, smaller current collapse is found thorough study of the gate-drain conductance dispersion especially when the gate static voltage is -8 V. Through a it is found that the growth of NbA10 can reduce the trap density of the AlGaN surface. Therefore, fewer traps can be filled by gate electrons, and hence the depletion effect in the channel is suppressed effectively. It is proved that the NbAIO gate dielectric can not only decrease gate leakage current but also passivate the A1GaN surface effectively, and weaken the current collapse effect accordingly.
We present an AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor （MIS-HEMT） with an NbAIO high-k dielectric deposited by atomic layer deposition （ALD）. Surface morphology of samples are observed by atomic force microscopy （AFM）, indicating that the ALD NbA10 has an excellent-property surface. Moreover, the sharp transition from depletion to accumulation in capacitance voltage （C-V）curse of MIS-HEMT demonstrates the high quality bulk and interface properties of NbA10 on A1GaN. The fabricated MIS-HEMT with a gate length of 0.5 μm exhibits a maximum drain current of 960 mA/mm, and the reverse gate leakage current is almost 3 orders of magnitude lower than that of reference HEMT. Based on the improved direct-current operation, the NbA10 can be considered to be a potential gate oxide comparable to other dielectric insulators.
A GaN/A10.3Ga0.TN/A1N/GaN high-electron mobility transistor utilizing a field plate （with a 0.3 μm overhang towards the drain and a 0.2 μm overhang towards the source） over a 165-nm sputtered HfO2 insulator （HfO2-FP- HEMT） is fabricated on a sapphire substrate. Compared with the conventional field-plated HEMT, which has the same geometric structure but uses a 60-nm SiN insulator beneath the field plate （SiN-FP-HEMT）, the HfO2-FP-HEMT exhibits a significant improvement of the breakdown voltage （up to 181 V） as well as a record field-plate efficiency （up to 276 V/μm）. This is because the HfO2 insulator can further improve the modulation of the field plate on the electric field distribution in the device channel, which is proved by the numerical simulation results. Based on the simulation results, a novel approach named the proportional design is proposed to predict the optimal dielectric thickness beneath the field plate. It can simplify the field-plated HEMT design significantly.
Nonpolar （1120） a-plane GaN films have been grown by low-pressure metal-organic vapor deposition on r-plane （1102） sapphire substrate. The structural and electrical properties of the a-plane GaN films are investigated by high-resolution X-ray diffraction （HRXRD）, atomic force microscopy （AFM） and van der Pauw Hall measurement. It is found that the Hall voltage shows more anisotropy than that of the c-plane samples; furthermore, the mobility changes with the degree of the van der Pauw square diagonal to the c direction, which shows significant electrical anisotropy. Further research indicates that electron mobility is strongly influenced by edge dislocations.
This paper studies the degradation of device parameters and that of stress induced leakage current （SILC） of thin tunnel gate oxide under channel hot electron （CHE） stress at high temperature by using n-channel metal oxide semiconductor field effect transistors （NMOSFETs） with 1.4-nm gate oxides. The degradation of device parameters under CHE stress exhibits saturating time dependence at high temperature. The emphasis of this paper is on SILC of an ultra-thin-gate-oxide under CHE stress at high temperature. Based on the experimental results, it is found that there is a linear correlation between SILC degradation and Vh degradation in NMOSFETs during CHE stress. A model of the combined effect of oxide trapped negative charges and interface traps is developed to explain the origin of SILC during CHE stress.
Comparative study of high and low temperature AlN interlayers and their roles in the properties of GaN epilayers prepared by means of metal organic chemical vapour deposition on （0001） plane sapphire substrates is carried out by high resolution x-ray diffraction, photoluminescence and Raman spectroscopy. It is found that the crystalline quality of GaN epilayers is improved significantly by using the high temperature A1N interlayers, which prevent the threading dislocations from extending, especially for the edge type dislocation. The analysis results based on photoluminescence and Ruman measurements demonstrate that there exists more compressive stress in GaN epilayers with high temperature AlN interlayers. The band edge emission energy increases from 3.423 eV to 3.438 eV and the frequency of the Raman shift of E2（TO） moves from 571.3 cm-1 to 572.9 cm-1 when the temperature of AlN interlayers increases from 700 ℃ to 1050 ℃. It is believed that the temperature of AlN interlayers effectively determines the size, the density and the coalescence rate of the islands, and the high temperature AlN interlayers provide large size and low density islands for GaN epilayer growth and the threading dislocations are bent and interactive easily. Due to the threading dislocation reduction in GaN epilayers with high temperature AlN interlayers, the approaches of strain relaxation reduce drastically, and thus the compressive stress in GaN epilayers with high temperature AlN interlayers is high compared with that in GaN epilayers with low temperature AlN interlayers.
AlGaN/GaN metal-insulator-semiconductor high electron-mobility transistors （MIS-HEMTs） with atomic layer deposited （ALD） NbA10 gate dielectric were investigated using 3 MeV proton irradiation at a fluence of 1015 p/crn2. It was found that the proton irradiation damage caused degradation in DC performance and a flatband voltage shift in the capacitance-voltage curve. Gate-drain conductance measurements indicated that new traps were introduced in GaN from the irradiation, and the trap densities increased from 1.18×10^12 cm-2.eV-1 to 1.82×10^12 cm-2.eV-1 in MIS-HEMTs after irradiation. However, these increases in trap densities caused by irradiation in MIS-HEMT are less than those in HEMT, which can be attributed to the protection of the A1GaN surface by the NbA10 dielectric layer.
BI ZhiWeiFENG QianZHANG JinChengLU LingMAO WeiGU WenPingMA XiaoHuaHAO Yue
