The temperature dependence of charge sharing in a 130 nm CMOS technology has been investigated over a temperature range of 200 to 420 K.Device simulation results show that the charge sharing collection increases by 66%-325% when the temperature rises.The LETth of a MBU in two SRAM cells and one DICE cell is also quantified.Besides charge sharing, the circuit response＇s temperature dependence also has a significant influence on the LETth.
The effect of p-well contact on the n-well potential modulation in a 90 nm bulk technology with P+ deep well is studied based on three-dimensional (3-D) TCAD device simulations. Simulation results illustrate that the p-well contact area has a great impact on the n-well potential modulation and the enhancement factor will level out as the p-well contact area increases, and that at the same time the increase of p-well doping concentration can also enhance the n-well potential modulation. However, the effect of p-well contact location on the n-well modulation is not obvious as the p-well contact distance increases. According to our simulation results, it is proposed that the p-well contact area should be cautiously designed to mitigate single event effect (SEE) in the P+ deep well technology.
