The free carrier density and mobility in n-type 4H-SiC substrates and epilayers were determined by accurately analysing the frequency shift and the full-shape of the longitudinal optic phono-plasmon coupled （LOPC） modes, and compared with those determined by Hall-effect measurement and that provided by the vendors. The transport properties of thick and thin 4H-SiC epilayers grown in both vertical and horizontal reactors were also studied. The free carrier density ranges between 2× 10^18 cm^-3 and 8× 10^18 cm^-3with a carrier mobility of 30-55 cm2/（V.s） for ntype 4H-SiC substrates and 1× 10^16 -3× 10^16 cm^-3 with mobility of 290-490 cm2/（V.s） for both thick and thin 4H-SiC epilayers grown in a horizontal reactor, while thick 4H-SiC epilayers grown in vertical reactor have a slightly higher carrier concentration of around 8.1×10^16 cm^-3 with mobility of 380 cm2/（V.s）. It was shown that Raman spectroscopy is a potential technique for determining the transport properties of 4H-SiC wafers with the advantage of being able to probe very small volumes and also being non-destructive. This is especially useful for future mass production of 4H-SiC epi-wafers.
We report the latest results of the 3C-SiC layer growth on Si（100）substrates by employing a novel home-made horizontal hot wall low pressure chemical vapour deposition（HWLPCVD）system with a rotating susceptor that was designed to support up to three 50 mm-diameter wafers.3C-SiC film properties of the intrawafer and the wafer-to-wafer,including crystalline morphologies and electronics,are characterized systematically. Intra-wafer layer thickness and sheet resistance uniformity（σ/mean）of～3.40%and～5.37%have been achieved in the 3×50 mm configuration.Within a run,the deviations of wafer-to-wafer thickness and sheet resistance are less than 4%and 4.24%,respectively.
Epitaxial growth on n-type 4H-SiC 8° off-oriented substrates with a size of 10 × 10 mm^2 at different temperatures with various gas flow rates has been performed in a horizontal hot wall CVD reactor, using trichlorosilane （TCS） as a silicon precursor source together with ethylene as a carbon precursor source. The growth rate reached 23 μm/h and the optimal epilayer was obtained at 1600℃ with a TCS flow rate of 12 sccm in C/Si of 0.42, which has a good surface morphology with a low RMS of 0.64 nm in an area of 10 x 10 pm2. The homoepitaxial layer was obtained at 1500℃ with low growth rate （〈 5 μm/h） and the 3C-SiC epilayers were obtained at 1650 ℃ with a growth rate of 60-70 μm/h. It is estimated that the structural properties of the epilayers have a relationship with the growth temperature and growth rate. Silicon droplets with different sizes are observed on the surface of the homoepitaxial layer in a low C/Si ratio of 0.32.
High quality,homoepitaxial layers of 4H-SiC were grown on off-oriented 4H-SiC（0001） Si planes in a vertical low-pressure hot-wall CVD system（LPCVD） by using trichlorosilane（TCS） as a silicon precursor source together with ethylene（C;H;） as a carbon precursor source.The growth rate of 25-30μm/h has been achieved at lower temperatures between 1500 and 1530℃.The surface roughness and crystalline quality of 50μm thick epitaxial layers（grown for 2 h） did not deteriorate compared with the corresponding results of thinner layers（grown for 30 min）.The background doping concentration was reduced to 2.13×10;cm;.The effect of the C/Si ratio in the gas phase on growth rate and quality of the epi-layers was investigated.
The infrared reflectance spectra of both 4H SiC substrates and epilayers are measured in a wave number range from 400 cm 1 to 4000 cm-1 using a Fourier-transform spectrometer. The thicknesses of the 4H-SiC epilayers and the electrical properties, including the free-carrier concentrations and the mobilities of both the 4H SiC substrates and the epilayers, are characterized through full line-shape fitting analyses. The correlations of the theoretical spectral profiles with the 4H-SiC electrical properties in the 30 cm-1-4000 cm 1 and 400 cm-1-4000 cm-1 spectral regions are established by introducing a parameter defined as error quadratic sum. It is indicated that their correlations become stronger at a higher carrier concentration and in a wider spectral region （30 cm-1-4000 cm-1）. These results suggest that the infrared reflectance technique can be used to accurately determine the thicknesses of the epilayers and the carrier concentrations, and the mobilities of both lightly and heavily doped 4H-SiC wafers.
A P-layer can be formed on a SiC wafer surface by using multiple Al ion implantations and post-implantation annealing in a low pressure CVD reactor.The Al depth profile was almost box shaped with a height of 1×10^（19）cm^（-3） and a depth of 550 nm.Three different annealing processes were developed to protect the wafer surface.Variations in RMS roughness have been measured and compared with each other.The implanted SiC, annealed with a carbon cap,maintains a high-quality surface with an RMS roughness as low as 3.8 nm.Macrosteps and terraces were found in the SiC surface,which annealed by the other two processes（protect in Ar/protect with SiC capped wafer in Ar）.The RMS roughness is 12.2 nm and 6.6 nm,respectively.
